arm.64

Vocabulary

system

Definition

IN: system

SINGLETON: arm.64

Methods

USING: combinators cpu.architecture cpu.arm.64 kernel sequences
system ;

M:: arm.64 %alien-assembly
    ( varargs? reg-inputs stack-inputs reg-outputs dead-outputs cleanup stack-size quot -- )
    stack-inputs [ first3 %store-stack-param ] each reg-inputs
    [ first3 %store-reg-param ] each varargs?
    [ reg-inputs %prepare-var-args ] when
    quot ( -- ) call-effect reg-outputs
    [ first3 %load-reg-param ] each ;


USING: cpu.architecture kernel system ;

M: arm.64 %alien-invoke [ %c-invoke ] 3curry %alien-assembly ;


USING: classes.struct cpu.architecture cpu.arm.64.assembler
kernel layouts math namespaces system vm ;

M:: arm.64 %allot ( ALLOT size class NURSERY -- )
    ALLOT VM "nursery" vm offset-of [+] LDR
    temp ALLOT size data-alignment get align ADD
    temp VM "nursery" vm offset-of [+] STR
    temp class type-number tag-header MOV temp ALLOT [] STR
    ALLOT dup class type-number ADD ;


USING: assocs cpu.architecture cpu.arm.64 cpu.arm.64.assembler
kernel sequences system ;

M:: arm.64 %box ( DST SRC func rep gc-map -- )
    rep reg-class-of f param-regs at first SRC rep %copy
    rep int-rep? arg2 arg1 ? VM MOV func f gc-map %c-invoke
    DST int-rep %load-return ;


USING: alien compiler.codegen.labels cpu.architecture cpu.arm.64
cpu.arm.64.assembler layouts system ;

M:: arm.64 %box-alien ( DST SRC TEMP -- )
    <label> :> end DST \ f type-number MOV SRC end CBZ
    DST 5 cells alien TEMP %allot temp \ f type-number MOV
    temp DST 1 alien@ STR temp DST 2 alien@ STR SRC DST 3 alien@
    STR SRC DST 4 alien@ STR end resolve-label ;


USING: compiler.codegen.gc-maps compiler.codegen.relocation
cpu.architecture cpu.arm.64.assembler kernel system ;

M: arm.64 %c-invoke [ (LDR=BLR) rel-dlsym ] dip gc-map-here ;


USING: compiler.codegen.relocation cpu.architecture
cpu.arm.64.assembler system ;

M: arm.64 %call (LDR=BLR) rel-word-pic ;


USING: compiler.codegen.gc-maps cpu.architecture memory system ;

M: arm.64 %call-gc \ minor-gc %call gc-map-here ;


USING: cpu.architecture cpu.arm.64 cpu.arm.64.assembler kernel
sequences system ;

M: arm.64 %callback-inputs
    temp FP [] LDR
    [ [ first3 %load-reg-param ] each ]
    [ [ first3 %load-stack-param ] each ] bi* arg1 VM MOV
    arg2 XZR MOV "begin_callback" f f %c-invoke ;


USING: cpu.architecture cpu.arm.64 cpu.arm.64.assembler
sequences system ;

M: arm.64 %callback-outputs
    arg1 VM MOV "end_callback" f f %c-invoke
    [ first3 %store-reg-param ] each ;


USING: classes.struct combinators compiler.cfg.comparisons
cpu.architecture cpu.arm.64.assembler layouts math system vm ;

M:: arm.64 %check-nursery-branch
    ( label size cc TEMP1 TEMP2 -- )
    "nursery" vm offset-of :> offset TEMP1 VM offset [+] LDR
    TEMP1 TEMP1 size ADD TEMP2 VM offset 2 cells + [+] LDR
    TEMP1 TEMP2 CMP cc
    { { cc<= [ label BLE ] } { cc/<= [ label BGT ] } } case ;


USING: cpu.architecture kernel system ;

M: arm.64 %clear 297 swap %replace-imm ;


USING: cpu.architecture cpu.arm.64 kernel system ;

M: arm.64 %compare-imm
    [ (%compare-imm) ] [ cc>cond ] [ %boolean ] tri* ;


USING: cpu.architecture cpu.arm.64 cpu.arm.64.assembler kernel
system ;

M: arm.64 %compare-imm-branch
    [ (%compare-imm) ] dip cc>cond B.cond ;


USING: combinators cpu.architecture cpu.arm.64
cpu.arm.64.assembler kernel system ;

M: arm.64 %copy
    [ [ ?spill-slot ] bi@ ] dip {
        { [ 2over eq? ] [ 3drop ] }
        {
            [
                3dup [ [ register? ] both? ] [ 64-gr-rep? ] bi*
                and
            ]
            [ drop MOV ]
        }
        {
            [
                3dup
                [ offset? ] [ register? ] [ 64-gr-rep? ] tri*
                and and
            ]
            [ drop swap STR ]
        }
        {
            [
                3dup
                [ register? ] [ offset? ] [ 64-gr-rep? ] tri*
                and and
            ]
            [ drop LDR ]
        }
        [ %copy-not-implemented ]
    } cond ;


USING: cpu.architecture cpu.arm.64.assembler kernel system ;

M: arm.64 %epilogue [ FP LR SP ] dip [post] LDP ;


USING: accessors compiler.cfg.registers cpu.architecture
cpu.arm.64.assembler kernel layouts math system ;

M: arm.64 %inc
    [ ds-loc? DS RS ? dup ] [ n>> cells ] bi dup 0 >
    [ ADD ] [ neg SUB ] if ;


USING: compiler.codegen.relocation cpu.architecture
cpu.arm.64.assembler system ;

M: arm.64 %jump
    PIC-TAIL 5 insns ADR (LDR=BR) rel-word-pic-tail ;


USING: compiler.codegen.labels compiler.constants
cpu.architecture cpu.arm.64.assembler system ;

M: arm.64 %jump-label 0 B rc-relative-arm-b label-fixup ;


USING: assocs cpu.architecture cpu.arm.64.assembler kernel math
sequences system ;

M: arm.64 %load-immediate
    [ XZR MOV ] [
        4 <iota> [ [ -16 * shift 65535 bitand ] keep ] with
        map>alist [ 0 = ] reject-keys unclip overd first2 MOVZ
        [ first2 MOVK ] with each
    ] if-zero ;


USING: compiler.codegen.relocation cpu.architecture
cpu.arm.64.assembler kernel layouts system ;

M: arm.64 %load-reference
    [ swap (LDR=) rel-literal ] [ \ f type-number MOV ] if* ;


USING: cpu.architecture cpu.arm.64 cpu.arm.64.assembler system ;

M: arm.64 %peek loc>operand LDR ;


USING: cpu.architecture cpu.arm.64.assembler kernel math system
;

M: arm.64 %prologue [ FP LR SP ] dip neg [pre] STP FP SP MOV ;


USING: cpu.architecture kernel system ;

M: arm.64 %reload swap %copy ;


USING: cpu.architecture cpu.arm.64 cpu.arm.64.assembler system ;

M: arm.64 %replace loc>operand STR ;


USING: combinators cpu.architecture cpu.arm.64.assembler kernel
layouts math system ;

M: arm.64 %replace-imm
    {
        { [ over 0 = ] [ nip XZR swap ] }
        {
            [ over fixnum? ]
            [ [ temp swap tag-fixnum MOV ] dip temp swap ]
        }
        { [ swap not ] [ temp \ f type-number MOV temp swap ] }
    } cond %replace ;


USING: cpu.architecture cpu.arm.64.assembler system ;

M: arm.64 %return RET ;


USING: cpu.architecture cpu.arm.64.assembler kernel system ;

M: arm.64 %safepoint SAFEPOINT dup [] STR ;


USING: classes.struct cpu.architecture cpu.arm.64.assembler
system vm ;

M:: arm.64 %save-context ( TEMP1 TEMP2 -- )
    TEMP1 %context TEMP2 SP MOV
    TEMP2 TEMP1 "callstack-top" context offset-of [+] STR
    DS TEMP1 "datastack" context offset-of [+] STR
    RS TEMP1 "retainstack" context offset-of [+] STR ;


USING: cpu.architecture kernel system ;

M: arm.64 %spill -rot %copy ;


USING: cpu.architecture cpu.arm.64 cpu.arm.64.assembler system ;

M:: arm.64 %unbox ( DST SRC func rep -- )
    arg1 SRC tagged-rep %copy arg2 VM MOV func f f %c-invoke
    DST rep %load-return ;


USING: alien compiler.codegen.labels compiler.constants
cpu.architecture cpu.arm.64.assembler layouts namespaces system
;

M:: arm.64 %unbox-any-c-ptr ( DST SRC -- )
    <label> :> end DST XZR MOV SRC \ f type-number CMP end BEQ
    DST SRC tag-mask get AND DST alien type-number CMP
    DST SRC byte-array-offset ADD end BNE
    DST SRC alien-offset [+] LDR end resolve-label ;


USING: cpu.architecture cpu.arm.64.assembler kernel system ;

M: arm.64 %vm-field VM swap [+] LDR ;


USING: cpu.architecture system ;

M: arm.64 dummy-fp-params? f ;


USING: cpu.architecture system ;

M: arm.64 dummy-stack-params? f ;


USING: cpu.architecture system ;

M: arm.64 enable-cpu-features ;


USING: cpu.architecture cpu.arm.64.assembler system ;

M: arm.64 frame-reg FP ;


USING: cpu.architecture system ;

M: arm.64 fused-unboxing? t ;


USING: cpu.architecture cpu.arm.64.assembler system ;

M: arm.64 immediate-comparand? add/sub-immediate? ;


USING: combinators cpu.architecture cpu.arm.64.assembler kernel
layouts math system ;

M: arm.64 immediate-store?
    {
        {
            [ dup fixnum? ]
            [ tag-fixnum 16 unsigned-immediate? ]
        }
        { [ dup not ] [ drop t ] }
        [ drop f ]
    } cond ;


USING: cpu.architecture system ;

M: arm.64 machine-registers
    {
        {
            int-regs
            {
                X0
                X1
                X2
                X3
                X4
                X5
                X6
                X7
                X8
                X10
                X11
                X12
                X13
                X14
                X15
            }
        }
        {
            float-regs
            {
                V0
                V1
                V2
                V3
                V4
                V5
                V6
                V7
                V16
                V17
                V18
                V19
                V20
                V21
                V22
                V23
                V24
                V25
                V26
                V27
                V28
                V29
                V30
            }
        }
    } ;


USING: cpu.architecture kernel system ;

M: arm.64 param-regs
    drop {
        { int-regs { X0 X1 X2 X3 X4 X5 X6 X7 } }
        { float-regs { V0 V1 V2 V3 V4 V5 V6 V7 } }
    } ;


USING: cpu.architecture system ;

M: arm.64 return-regs
    { { int-regs { X0 X1 } } { float-regs { V0 } } } ;


USING: cpu.architecture kernel system ;

M: arm.64 stack-cleanup 3drop 0 ;


USING: compiler.cfg.stack-frame cpu.architecture layouts math
system ;

M: arm.64 stack-frame-size
    (stack-frame-size) 2 cells + 16 align ;