Because of the design of the register allocator, this pass has three peculiar properties.
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Instead of renaming vreg usages in the CFG, a map from vregs to canonical representatives is computed. This allows the register allocator to use the original SSA names to get reaching definitions. See leader-map.
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Useless ##copy instructions, and all ##phi instructions, are eliminated, so the register allocator does not have to remove any redundant operations.
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This pass computes live sets and fills out the gc-roots slots of GC maps with compiler.cfg.liveness, so the linear scan register allocator does not need to compute liveness again.